ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 104

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

February 1997
10 Timing Characteristics for 2.7 V Operation
Table 94. PHIF Timing Characteristics for PHIF, PIBF, and POBE Reset
* After reset, POBE and PIBF always go to the levels shown, indicating output buffer empty and input buffer empty. The DSP program,
† POBE and PIBF can be programmed to be active-high or active-low. They are shown active-high. The timing characteristic for
Table 95. PHIF Timing Characteristics for POBE and PIBF Disable
Lucent Technologies Inc.
however, may later invert the definition of the logic levels for POBE and PIBF. t57 and t58 continue to apply.
active-low is the same as for active-high
Abbreviated Reference
Abbreviated Reference
POBE
POBE
PIBF
RSTB
PIBF
CKO
†
†
t59
t57
t58
V
V
V
V
V
V
V
V
V
V
V
V
OH
OH
OH
OH
OL
OL
OL
OL
IH
IH
IL
IL
–
–
–
–
–
–
–
–
–
–
–
–
Figure 28. PHIF, PIBF, and POBE Disable Timing Diagram
Figure 27. PHIF, PIBF, and POBE Reset Timing Diagram
CKO to POBE/PIBF* Disable (high/low to disable)
RSTB Disable to POBE/PIBF* (high to valid)
RSTB Enable to POBE/PIBF* (low to invalid)
.
t57
t59
Parameter
Parameter
t59
(continued)
DSP1628 Digital Signal Processor
Min
t58
Min
—
3
—
Max
Max
25
25
20
5-4775 (F)
5-4776 (F)
Unit
Unit
ns
ns
ns
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