ds96-039wdsp ETC-unknow, ds96-039wdsp Datasheet - Page 99

• Manufacturer Part Number: ds96-039wdsp
• Description: Clarification Serial Control Register Description Dsp1620/27/28/29 Devices
• Manufacturer: ETC-unknow

DSP1628 Digital Signal Processor
10 Timing Characteristics for 2.7 V Operation
10.8 PHIF Specifications
For the PHIF, read means read by the external user (output by the DSP); write is similarly defined. The 8-bit reads/
writes are identical to one-half of a 16-bit access.
Table 84. Timing Requirements for PHIF Intel Mode Signaling
Table 85. Timing Characteristics for PHIF Intel Mode Signaling
* This timing diagram for the PHIF port shows accesses using the PCSN signal to initiate and complete a transaction. The transactions can also
97
Abbreviated Reference
Abbreviated Reference
be initiated and completed with the PIDS and PODS signals. An output transaction (read) is initiated by PCSN or PODS going low, whichever
comes last. For example, the timing requirements referenced to PCSN going low, t45 and t49, should be referenced to PODS going low, if
PODS goes low after PCSN. An output transaction is completed by PCSN or PODS going high, whichever comes first. An input transaction is
initiated by PCSN or PIDS going low, whichever comes last. An input transaction is completed by PCSN or PIDS going high, whichever comes
first. All requirements referenced to PCSN apply to PIDS or PODS, if PIDS or PODS is the controlling signal.
PBSEL
PSTAT
PB[7:0]
PODS
PCSN
PIDS
V
V
V
V
V
V
V
V
V
V
IH
IH
IH
IH
IH
IL
IL
IL
IL
IL
t154
t45*
t46*
t47*
t48*
t51*
t52*
t49*
t50*
t41
t42
t43
t44
Figure 22. PHIF Intel Mode Signaling (Read and Write) Timing Diagram
t45
t41
16-bit READ
t49
PODS to PCSN Setup (low to low)
PCSN to PODS Hold (high to high)
PIDS to PCSN Setup (low to low)
PCSN to PIDS Hold (high to high)
PSTAT to PCSN Setup (valid to low)
PCSN to PSTAT Hold (high to invalid)
PBSEL to PCSN Setup (valid to low)
PCSN to PBSEL Hold (high to invalid)
PB Write to PCSN Setup (valid to high)
PCSN to PB Write Hold (high to invalid)
PCSN to PB Read (low to valid)
PCSN to PB Read Hold (high to invalid)
PCSN to PB Read 3-state (high to 3-state)
t154
Parameter
Parameter
t42
t46
t50
(continued)
t51
t43
t47
Min
Min
10
—
—
0
0
0
0
4
0
6
0
4
0
16-bit WRITE
Lucent Technologies Inc.
Max
Max
12
—
—
—
—
—
—
—
—
—
—
—
February 1997
8
t44
t48
t52
Unit
Unit
5-4036 (C)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns