tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 103

• Manufacturer Part Number: tmp86fh09amg
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Example :Generating a pulse with 1-ms high-level width and a period of 32.768 ms (fc = 16.0 MHz)
Table 9-7 16-Bit PWM Output Mode
DV7CK = 0
NORMAL1/2, IDLE1/2 mode
fc/2
fc/2
fc/2
fc/2
fc/2
PWREG4 and 3 can be changed while the timer is running. The values set to PWREG4 and 3 during a run
of the timer are shifted by the INTTCj interrupt request and loaded into PWREG4 and 3. While the timer is stop-
ped, the values are shifted immediately after the programming of PWREG4 and 3. Set the lower byte
(PWREG3) and upper byte (PWREG4) in this order to program PWREG4 and 3. (Programming only the low-
er or upper byte of the register should not be attempted.)
is read, but not the values set in PWREG4 and 3. Therefore, after writing to the PWREG4 and 3, reading da-
ta of PWREG4 and 3 is previous value until INTTC4 is generated.
fs
fc
11
7
5
3
Note 1: In the PWM mode, program the timer register PWREG4 and 3 immediately after the INTTC4 interrupt re-
Note 2: When the timer is stopped during PWM output, the PWM4 pin holds the output status when the timer is
Note 3: To enter the STOP mode, stop the timer and then enter the STOP mode. If the STOP mode is entered with-
Since PWREG4 and 3 in the PWM mode are serially connected to the shift register, the values set to
If executing the read instruction to PWREG4 and 3 during PWM output, the values set in the shift register
For the pin used for PWM output, the output latch of the I/O port must be set to 1.
quest is generated (normally in the INTTC4 interrupt service routine.) If the programming of PWREGj
and the interrupt request occur at the same time, an unstable value is shifted, that may result in genera-
tion of pulse different from the programmed value until the next INTTC4 interrupt request is generated.
stopped. To change the output status, program TC4CR<TFF4> after the timer is stopped. Do not pro-
gram TC4CR<TFF4> upon stopping of the timer.
Example: Fixing the PWM4 pin to the high level when the TimerCounter is stopped
CLR (TC4CR).3 ; Stops the timer.
CLR (TC4CR).7 ; Sets the PWM4 pin to the high level.
out stopping of the timer when fc, fc/2 or fs is selected as the source clock, a pulse is output from the
PWM4 pin during the warm-up period time after exiting the STOP mode.
Source Clock
DV7CK = 1
fs/2
fc/2
fc/2
fc/2
fc/2
3
fs
fc
LDW
LD
LD
LD
[Hz]
7
5
3
Setting ports
(PWREG3), 07D0H
(TC3CR), 33H
(TC4CR), 056H
(TC4CR), 05EH
SLOW1/2,
SLEEP1/2
fs/2
mode
3
fs
-
-
-
-
-
[Hz]
fc = 16 MHz
Page 93
30.5 μs
62.5 ns
128 μs
500 ns
125 ns
8 μs
2 μs
; Sets the pulse width.
; Sets the operating clock to fc/2
; (lower byte).
; Sets TFF4 to the initial value 0, and 16-bit PWM signal
; generation mode (upper byte).
; Starts the timer.
Resolution
fs = 32.768 kHz
244.14 μs
30.5 μs
-
-
-
-
-
3
, and 16-bit PWM output mode
fc = 16 MHz
524.3 ms
131.1 ms
32.8 ms
8.2 ms
4.1 ms
8.39 s
2 s
Repeated Cycle
TMP86FH09AMG
fs = 32.768 kHz
16 s
2 s
-
-
-
-
-