tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 48

• Manufacturer Part Number: tmp86fh09amg
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

3.6
Undefined Instruction Interrupt (INTUNDEF)
3.6
3.7
3.8
3.5.2
erated when the CPU fetches such a code and tries to execute it. INTUNDEF is accepted even if non-maskable in-
terrupt is in process. Contemporary process is broken and INTUNDEF interrupt process starts, soon after it is reques-
ted.
dress trap interrupt (INTATRAP). INTATRAP is accepted even if non-maskable interrupt is in process. Contempo-
rary process is broken and INTATRAP interrupt process starts, soon after it is requested.
cuits (Pulse inputs of less than a certain time are eliminated as noise).
terrupt input pin or an input/output port, and is configured as an input port during reset.
control register (EINTCR).
Undefined Instruction Interrupt (INTUNDEF)
Address Trap Interrupt (INTATRAP)
External Interrupts
Taking code which is not defined as authorized instruction for instruction causes INTUNDEF. INTUNDEF is gen-
Fetching instruction from unauthorized area for instructions (Address trapped area) causes reset output or ad-
The TMP86FH09AMG has 5 external interrupt inputs. These inputs are equipped with digital noise reject cir-
Edge selection is also possible with INT1 to INT4. The INT0/P10 pin can be configured as either an external in-
Edge selection, noise reject control and INT0/P10 pin function selection are performed by the external interrupt
Note:The undefined instruction interrupt (INTUNDEF) forces CPU to jump into vector address, as software inter-
Note:The operating mode under address trapped, whether to be reset output or interrupt processing, is selected
dress.
Debugging
Debugging efficiency can be increased by placing the SWI instruction at the software break point setting ad-
rupt (SWI) does.
on watchdog timer control register (WDTCR).
Page 38
TMP86FH09AMG