tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 80

• Manufacturer Part Number: tmp86fh09amg
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

8.3
Function
8.3.3
TC1 pin Input
Up-counter
TC1DRA
INTTC1
interrput request
the rising or falling edge of the input pulse is selected as the count up edge in TC1CR<TC1S>.
ated and the up-counter is cleared. After being cleared, the up-counter restarts counting at each edge of the in-
put pulse to the TC1 pin. Since a match between the up-counter and the value set to TC1DRA is detected at
the edge opposite to the selected edge, an INTTC1 interrupt request is generated after a match of the value at
the edge opposite to the selected edge.
tion. Use the auto-capture function in the operative condition of TC1. A captured value may not be fixed if
it's read after the execution of the timer stop or auto-capture disable. Read the capture value in a capture ena-
bled condition. Since the up-counter value is captured into TC1DRB by the source clock of up-counter after set-
ting TC1CR<ACAP1> to "1". Therefore, to read the captured value, wait at least one cycle of the internal
source clock before reading TC1DRB for the first time.
Event Counter Mode
In the event counter mode, the up-counter counts up at the edge of the input pulse to the TC1 pin. Either
When a match between the up-counter and the TC1DRA value is detected, an INTTC1 interrupt is gener-
Two or more machine cycles are required for the low-or high-level pulse input to the TC1 pin.
Setting TC1CR<ACAP1> to “1” captures the up-counter value into TC1DRB with the auto capture func-
Table 8-2 Input Pulse Width to TC1 Pin
?
Timer start
High-going
Low-going
Figure 8-4 Event Counter Mode Timing Chart
0
n
1
NORMAL1/2, IDLE1/2 Mode
2
2
2
Page 70
3
3
/fc
/fc
Minimum Pulse Width [s]
Match detect
n − 1
SLOW1/2, SLEEP1/2 Mode
n
0
Counter clear
2
2
3
3
/fs
/fs
1
TMP86FH09AMG
2
(TC1S = 10)
At the
rising edge