tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 71

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tmp86fh09amg

Manufacturer Part Number
tmp86fh09amg
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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7.3.4
tempt be made to fetch an instruction from the on-chip RAM (while WDTCR1<ATAS> is “1”), DBR or the
SFR area, address trap reset will be generated.
24/fc [s] (1.5 μs @ fc = 16.0 MHz).
Address Trap Reset
While WDTCR1<ATOUT> is “1”, if the CPU should start looping for some cause such as noise and an at-
When an address trap reset request is generated, the internal hardware is reset. The reset time is maximum
Note:When an address trap reset is generated in the SLOW1 mode, the reset time is maximum 24/fc (high-
frequency clock) since the high-frequency clock oscillator is restarted. However, when crystals have in-
accuracies upon start of the high-frequency clock oscillator, the reset time should be considered as
an approximate value because it has slight errors.
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TMP86FH09AMG

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