tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 110

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tmp86fh09amg

Manufacturer Part Number
tmp86fh09amg
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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10.2
Control
10.2
UART Control Register1
UARTCR1
(0025H)
tored using the UART status register (UARTSR).
UART is controlled by the UART Control Registers (UARTCR1, UARTCR2). The operating status can be moni-
Note 1: When operations are disabled by setting TXE and RXE bit to “0”, the setting becomes valid when data transmit or re-
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UARTCR1<RXE> and UARTCR1<TXE> should be set to “0” before UARTCR1<BRG> is changed.
Control
TXE
7
ceive complete. When the transmit data is stored in the transmit data buffer, the data are not transmitted. Even if da-
ta transmit is enabled, until new data are written to the transmit data buffer, the current data are not transmitted.
EVEN
STBT
BRG
RXE
TXE
PE
RXE
6
Transfer operation
Receive operation
Transmit stop bit length
Even-numbered parity
Parity addition
Transmit clock select
STBT
5
EVEN
4
PE
3
2
Page 100
000:
001:
010:
011:
100:
101:
110:
111:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
BRG
1
Disable
Enable
Disable
Enable
1 bit
2 bits
Odd-numbered parity
Even-numbered parity
No parity
Parity
fc/13 [Hz]
fc/26
fc/52
fc/104
fc/208
fc/416
TC3 (Input INTTC3)
fc/96
0
(Initial value: 0000 0000)
TMP86FH09AMG
Write
only

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