tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 142
tmp86fh09amg
Manufacturer Part Number
tmp86fh09amg
Description
8 Bit Microcontroller Tlcs-870/c Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FH09AMG.pdf
(198 pages)
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14.1
Flash Memory Control
14.1
Flash Memory Control Register
Flash Memory Standby Control Register
14.1.1
14.1.2
(0FFFH)
FLSSTB
(0FE9H)
FLSCR
trol resister (FLSSTB).
The flash memory is controlled via the flash memory control register (FLSCR) and flash memory standby con-
Note 1: The command sequence of the flash memory can be executed only when FLSMD="0011B". In other cases, any at-
Note 2: FLSMD must be set to either "1100B" or "0011B".
Note 3: Bits 3 through 0 in FLSCR are always read as don’t care.
Note 4: Always set bit3 in FLSCR to "1".
Note 1: When FSTB is set to 1, do not execute the read/write instruction to the flash memory because there is a possibility
Note 2: If an interrupt is issued when FSTB is set to 1, FSTB is initialized to 0 automatically and then the vector area of the
Note 3: If the IDLE0/1/2, SLEEP0/1/2 or STOP mode is activated when FSTB is set to 1, FSTB is initialized to 0 automatical-
Flash Memory Control
ation. This write protection feature is realized by disabling flash memory command sequence execution via
the flash memory control register (write protect). To enable command sequence execution, set
FLSCR<FLSMD> to “0011B”. To disable command sequence execution, set FLSCR<FLSMD> to “1100B”.
After reset, FLSCR<FLSMD> is initialized to “1100B” to disable command sequence execution. Normally,
FLSCR<FLSMD> should be set to “1100B” except when the flash memory needs to be written or erased.
IDLE0/1/2, SLEEP0/1/2 or STOP mode, the steady-state current of the flash memory is cut off automatically.
1/2 or SLOW1/2 mode, the current can be cut off by the control of the register. To cut off the steady-state cur-
rent of the flash memory, set FLSSTB<FSTB> to “1” by the control program in the RAM area. The proce-
dures for controlling the FLSSTB register are explained below.
the write control program executed in the RAM area.)
The flash memory can be protected from inadvertent write due to program error or microcontroller misoper-
Low power consumption is enabled by cutting off the steady-state current of the flash memory. In the
When the program is executed in the RAM area (without accessing the flash memory) in the NORMAL
(Steps1 and 2 are controlled by the program in the flash memory, and steps 3 through 8 are controlled by
FLSMD
Flash Memory Command Sequence Execution Control (FLSCR<FLSMD>)
Flash Memory Standby Control (FLSSTB<FSTB>)
FSTB
7
7
tempts to execute the command sequence are ineffective.
that the expected data is not read or the program is not operated correctly. If executing the read/write instruction,
FSTB is initialized to 0 automatically.
flash memory is read.
ly. In the IDLE0/1/2, SLEEP0/1/2 or STOP mode, the standby function operates regardless of FSTB setting.
Flash memory command sequence exe-
cution control
Flash memory standby control
6
6
FLSMD
5
5
4
4
Page 132
"1"
3
3
1100: Disable command sequence execution
0011: Enable command sequence execution
Others: Reserved
0: Disable the standby function.
1: Enable the standby function.
2
2
1
1
FSTB
0
0
(Initial value: 1100 ****)
(Initial value: **** ***0)
TMP86FH09AMG
Write
R/W
only
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