tmp86fh09amg TOSHIBA Semiconductor CORPORATION, tmp86fh09amg Datasheet - Page 119

• Manufacturer Part Number: tmp86fh09amg
• Description: 8 Bit Microcontroller Tlcs-870/c Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

11. Serial Expansion Interface (SEI)
11.1
ces via full-duplex synchronous communication protocols. The TMP86FH09AMG contain one channel of SEI.
SO, and SS pins respectively are shared with P02, P03, P04 and P05. When using these ports as SCLK, MOSI, MI-
SO, or SS pins, set the each Port Output Latch to “1”.
SEI is one of the serial interfaces incorporated in the TMP86FH09AMG. It allows connection to peripheral devi-
SEI is connected with an external device through SCLK, MOSI, MISO and the terminal SS. SCLK, MOSI, MI-
Note:Mode fault detect function is not supported. Make sure to set SECR<MODE> bit to "1" for disabling the
Features
・ The master outputs the shift clock for only a data transfer period.
・ The clock polarity and phase are programmable.
・ The data is 8 bits long.
・ MSB or LSB-first can be selected.
・ The programmable data and clock timing of SEI can be connected to almost all synchronous serial periph-
・ The transfer rate can be selected from the following four (master only):
・ The error detection circuit supports the following functions:
Mode fault detection.
eral devices. Refer to “"11.5 SEI Transfer Formats " ”.
a. Write collision detection: When the shift register is accessed for write during transfer
b. Overflow detection: When new data is received while the transfer-finished flag is set (slave only)
4 Mbps, 2 Mbps, 1 Mbps, or 250 kbps (when operating at 16 MHz)
register
register
control
status
SEI
SEI
Figure 11-1 SEI (Serial Extended Interface)
SEE
MODE
MSTR
CPHA
CPOL
BOS
SER
WCOL
SOVF
SEF
4, 8, 16, 64 divide
Clock control unit
Internal SEI clock
SEI control unit
Clock selection
Page 109
SEI interrupt
(INTSEI1)
MISO
Bit order selection
SEI data register
Port control unit
Read buffer
Shift register
MOSI SCLK SS
Data
Address
TMP86FH09AMG