mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 137

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mc9s12ne64

Manufacturer Part Number
mc9s12ne64
Description
Hcs12 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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A valid edge on input is detected if 4 consecutive samples of a passive level are followed by 4 consecutive
samples of an active level directly or indirectly.
The filters are continuously clocked by the bus clock in RUN and WAIT mode. In STOP mode the clock
is generated by a single RC oscillator in the Port Integration Module. To maximize current saving the RC
oscillator runs only if the following condition is true on any pin:
Sample count <= 4 and port interrupt enabled (PIE=1) and port interrupt flag not set (PIF=0).
3.4.9
The EMAC module is connected to port H.
Port H pins PH[6:0] can be used either for general-purpose I/O or with the EMAC subsystems. Further the
keypad wake-up function is implemented on pins H[6:0].
Port H offers the same interrupt features as on port G.
During reset, port H pins are configured as high-impedance inputs.
3.4.10
The EMAC and IIC modules are connected to port J.
Port J pins PJ[7:6] can be used either for general-purpose I/O or with the IIC subsystem. Port J pins PJ[3:0]
can be used either for general-purpose I/O or with the EMAC subsystems. Further the Keypad Wake-Up
function is implemented on pins H[6:0].
Port J offers the same interrupt features as on port G.
Freescale Semiconductor
Port H
Port J
1
These values include the spread of the oscillator frequency over temperature,
voltage and process.
Uncertain
Ignored
Pulse
Valid
Table 3-4. Pulse Detection Criteria
MC9S12NE64 Data Sheet, Rev. 1.1
3 < t
Figure 3-48. Pulse Illustration
t
pulse
t
pign
pval
STOP
<= 3
>= 4
< 4
t
pulse
bus clocks
bus clocks
bus clocks
Unit
Mode
3.2 < t
t
STOP
pulse
pign
t
pval
<= 3.2
>= 10
< 10
1
Unit
µs
µs
µs
Functional Description
137

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