mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 215

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

7.3.2.4
This register controls the conversion sequence length, FIFO for results registers and behavior in freeze
mode. Writes to this register will abort current conversion sequence but will not start a new sequence.
Read: Anytime
Write: Anytime
Freescale Semiconductor
S8C, S4C,
S2C, S1C
Reset
ASCIE
ASCIF
Field
Field
6–3
1
0
W
R
Conversion Sequence Length — These bits control the number of conversions per sequence.
all combinations. At reset, S4C is set to 1 (sequence length is 4). This is to maintain software continuity to HC12
Family.
ATD Control Register 3 (ATDCTL3)
0
0
ATD Sequence Complete Interrupt Enable
0 ATD Sequence Complete interrupt requests are disabled.
1 ATD Interrupt will be requested whenever ASCIF = 1 is set.
ATD Sequence Complete Interrupt Flag — If ASCIE = 1 the ASCIF flag equals the SCF flag (see
Section 7.3.2.7, “ATD Status Register 0
0 No ATD interrupt occurred
1 ATD sequence complete interrupt pending
7
= Unimplemented or Reserved
S8C
0
6
ETRIGLE
Table 7-5. ATDCTL2 Field Descriptions (continued)
Figure 7-6. ATD Control Register 3 (ATDCTL3)
0
0
1
1
Table 7-6. External Trigger Configurations
Table 7-7. ATDCTL3 Field Descriptions
S4C
MC9S12NE64 Data Sheet, Rev. 1.1
0
5
ETRIGP
0
1
0
1
(ATDSTAT0)”), else ASCIF reads zero. Writes have no effect.
S2C
0
4
Description
Description
External Trigger Sensitivity
S1C
0
3
Falling edge
Rising edge
High level
Low level
FIFO
0
2
Memory Map and Register Definition
FRZ1
0
1
Table 7-8
FRZ0
0
0
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