mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 362

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 12 Ethernet Physical Transceiver (EPHYV2)
Message/Unformatted Code Field
12.3.3.8 Auto-Negotiation Expansion Register
Figure 12-13
This register contains information about the A/N capabilities of the port’s link partner and information on
the status of the parallel detection mechanism.
MII Register Address 6 (%00110)
Read: Anytime
Write: Never
PDFLT — Parallel Detection Fault
LPNPA — Link Partner Next Page Able
NXTPA — Next Page Able
PRCVD — Page Received
362
RESET:
W
Message code field — Predefined code fields defined in IEEE 802.3u-1995 Annex 28C
Unformatted code filed — 11-bit field containing an arbitrary value
This bit is used to indicate that zero or more than one of the NLP receive link integrity test function
for 100BASE-TX have indicated that the link is ready (link_status=READY) when the A/N wait timer
has expired. PDFLT will be reset to 0 after a read of register 6.
Bit to indicate whether the link partner has the capability of using NP.
This bit is used to inform the MI and the link partner whether the port has next page capabilities.
Bit is used to indicate whether a new link code word has been received and stored in the A/N link
partner ability register (MII register 5). PRCVD is reset to 0 after register 6 is read.
R
1 = Parallel detection fault has occurred
0 = Parallel detection fault has not occurred
1 = Link partner is next page able
0 = Link partner is not next page able
1 = The port has next page capabilities
0 = The port does not have next page capabilities
1 = Three identical and consecutive link code words have been received from link partner
0 = Three identical and consecutive link code words have not been received from link partner
15
0
0
shows the contents of the A/N expansion register. The MI process can only read this register.
= Unimplemented or Reserved
14
0
0
13
0
0
Figure 12-13. Auto-Negotiation Expansion Register
12
0
0
11
0
0
MC9S12NE64 Data Sheet, Rev. 1.1
10
0
0
9
0
0
8
0
0
7
0
0
6
0
0
5
0
0
PDFLT LPNPA NXTPA PRCVD LPANA
4
0
3
0
Freescale Semiconductor
2
1
1
0
0
0