mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 517

• Manufacturer Part Number: mc9s12ne64
• Description: Hcs12 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

A.12.1.4
When external reset is asserted for a time greater than PW
reset, and the CPU starts fetching the reset vector without doing a clock quality check, if there was an
oscillation before reset.
A.12.1.5
Out of stop, the controller can be woken up by an external interrupt. A clock quality check as after POR is
performed before releasing the clocks to the system.
A.12.1.6
The recovery from pseudo stop and wait are essentially the same because the oscillator was not stopped in
either mode. The controller can be woken up by internal or external interrupts. After t
fetching the interrupt vector.
A.12.2
The device features an internal Pierce oscillator. Before asserting the oscillator to the internal system
clocks the quality of the oscillation is checked for each start from either power-on, STOP or oscillator fail.
t
if a proper oscillation is not detected. The quality check also determines the minimum oscillator start-up
time t
of the incoming clock signal is below the assert frequency f
Freescale Semiconductor
CQOUT
UPOSC
specifies the maximum time before switching to the internal self clock mode after POR or STOP
. The device also features a clock monitor. A clock monitor failure is asserted if the frequency
Oscillator
External Reset
Stop Recovery
Pseudo Stop and Wait Recovery
MC9S12NE64 Data Sheet, Rev. 1.1
RSTL
CMFA.
the CRG module generates an internal
Reset, Oscillator, and PLL Electrical Characteristics
wrs
the CPU starts
517