mc9s12ne64 Freescale Semiconductor, Inc, mc9s12ne64 Datasheet - Page 350

no-image

mc9s12ne64

Manufacturer Part Number
mc9s12ne64
Description
Hcs12 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc9s12ne64CPV
Manufacturer:
RENESAS
Quantity:
21 000
Part Number:
mc9s12ne64CPV
Manufacturer:
FREESCAL
Quantity:
455
Part Number:
mc9s12ne64CPV
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12ne64CPVE
Manufacturer:
ST
Quantity:
445
Part Number:
mc9s12ne64CPVE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12ne64VTU
Manufacturer:
FREESCALE
Quantity:
1 831
Part Number:
mc9s12ne64VTU
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12ne64VTUE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mc9s12ne64VTUE
Manufacturer:
ALTERA
0
Part Number:
mc9s12ne64VTUE
Manufacturer:
FREESCALE
Quantity:
20 000
Chapter 12 Ethernet Physical Transceiver (EPHYV2)
12.2.4
Ethernet twisted-pair input pin. This pin is high-impedance out of reset.
12.2.5
Connect a 1.0% external resistor, RBIAS (see Electrical Characteristics chapter), between the
PHY_RBIAS pin and analog ground. Place this resistor as near to the chip pin as possible. Stray
capacitance must be kept to less than 10 pF (>50 pF will cause instability). No high-speed signals are
permitted in the region of RBIAS.
12.2.6
Power is supplied to the EPHY receiver through PHY_VDDRX and PHY_VSSRX. This 2.5 V supply is
derived from the internal voltage regulator. There is no static load on those pins allowed. The internal
voltage regulator is turned off, if V
12.2.7
External power is supplied to the EPHY transmitter through PHY_VDDTX and PHY_VSSTX. This 2.5 V
supply is derived from the internal voltage regulator. There is no static load on those pins allowed. The
internal voltage regulator is turned off, if V
12.2.8
Power is supplied to the EPHY PLLs through PHY_VDDA and PHY_VSSA. This 2.5 V supply is derived
from the internal voltage regulator. There is no static load on those pins allowed. The internal voltage
regulator is turned off, if V
12.2.9
Flashes in half-duplex mode when a collision occurs on the network if EPHYCTL0 LEDEN bit is set.
12.2.10 DUPLED — Duplex LED
Indicates the duplex of the link, which can be full-duplex or half-duplex if EPHYCTL0 LEDEN bit is set.
12.2.11 SPDLED — Speed LED
Indicates the speed of a link, which can be 10 Mbps or 100 Mbps if EPHYCTL0 LEDEN bit is set.
12.2.12 LNKLED — Link LED
Indicates whether a link is established with another network device if EPHYCTL0 LEDEN bit is set.
350
PHY_RXN — EPHY Twisted Pair Input –
PHY_RBIAS — EPHY Bias Control Resistor
PHY_VDDRX, PHY_VSSRX — Power Supply Pins for EPHY Receiver
PHY_VDDTX, PHY_VSSTX — Power Supply Pins for EPHY
Transmitter
PHY_VDDA, PHY_VSSA — Power Supply Pins for EPHY Analog
COLLED — Collision LED
DDR
is tied to ground.
DDR
MC9S12NE64 Data Sheet, Rev. 1.1
is tied to ground.
DDR
is tied to ground.
Freescale Semiconductor

Related parts for mc9s12ne64