s71ws512ne0bfwzz Meet Spansion Inc., s71ws512ne0bfwzz Datasheet - Page 107

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s71ws512ne0bfwzz

Manufacturer Part Number
s71ws512ne0bfwzz
Description
Stacked Multi-chip Product Mcp Flash Memoy And Psram Cmos 1.8 Volt, Simultaneous Operation, Burst Mode Flash Memory And Pseudo-static Ram
Manufacturer
Meet Spansion Inc.
Datasheet
FUNCTIONAL DESCRIPTION (Continued)
June 28, 2004 S71WS512NE0BFWZZ_00_A1
ADDRESS
ADDRESS
Burst Read Termination
Burst Write Termination
CLK
ADV#
CE#1
OE#
WAIT#
DQ
CLK
ADV#
CE#1
WE#
WAIT#
DQ
Burst read operation can be terminated by CE#1 brought to High. If BL is set on
Continuous, burst read operation is continued endless unless terminated by
CE#1=H. It is inhibited to terminate burst read before first data out is completed.
In order to guarantee last data output, the specified minimum value of CE#1=L
hold time from clock edge must be satisfied. After termination, the specified
minimum recovery time is required to start new access.
Burst write operation can be terminated by CE#1 brought to High. If BL is set on
Continuous, burst write operation is continued endless unless terminated by
CE#1=H. It is inhibited to terminate burst write before first data in is completed.
In order to guarantee last write data being latched, the specified minimum values
of CE#1=L hold time from clock edge must be satisfied. After termination, the
specified minimum recovery time is required to start new access.
t
D-
Q
D
1
t
1
t
t
AC
t
CKCLH
CKOH
t
t
DHCK
CKCLH
CKWH
t
D-
Q
D
2
P r e l i m i n a r y
2
t
DHCK
t
CKQX
t
t
128Mb pSRAM
CHZ
OHZ
t
CHZ
t
TRB
t
High-Z
TRB
High-Z
Valid
Valid
107

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