cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 141

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
5.8.13
Table 5-53. TSIU Port Configuration Register (1 of 2)
28560-DSH-001-B
31:15
11:9
Bit
8:6
14
13
12
RSVD
TGSYNC__EDGE
TXENBL
RSVD
TPORT_TYPE
[2:0]
RSVD
Field Name
TSIU Port Configuration Register
There is a Transmit Port Configuration register for each serial port. It defines how the
CX28560 interprets and synchronizes the received bit streams associated with the serial port.
Table 5-53
Value
—
0
0
1
0
1
0
0
1
2
3
4
5
6
7
describes the bit fields in TSIU Port Configuration register.
Reserved.
Transmitter GSYNC—Falling Edge
Transmitter GSYNC—Rising Edge
Transmit Port Disabled.
Logically resets the time slot, regardless of TTS_ENABLE bit field in TSIU Time Slot
Configuration Descriptor. This does not affect the bit values in any time slot descriptor.
Transmit Port Enabled.
This bit field acts as a logical AND between TTS_ENABLE bit field in TSIU Time Slot
Configuration Descriptor and time slot.
Logically, if TTS_ENABLE bit field in TSIU Time Slot Configuration Descriptor is enabled,
it allows all channels with time slot enable bits set to start processing data. This does not
affect the bit values in any time slot descriptor.
Reserved.
Unchannelized Mode.
It is the user’s responsibility to configure the time slot map to contain one time slot.
T1 mode.
This mode implies 24 time slots and T1 signaling. It is the user’s responsibility to
configure the time slot map to contain exactly 24 time slots.
Nx64 mode = 2 Time Slots
It is the user’s responsibility to configure the time slot map to contain exactly two time
slots.
Nx64 mode = 3 Time Slots
It is the user’s responsibility to configure the time slot map to contain exactly three time
slots.
Nx64 mode = 4 Time Slots
It is the user’s responsibility to configure the time slot map to contain exactly four time
slots.
Nx64 mode
It is the user’s responsibility to configure the time slot map to contain more than four
time slots.
TSBUS Mode.
It is the user’s responsibility to configure the time slot map to contain at least eight time
slots. For the first twelve ports this mode can also be used for DS0 extraction. This is
performed by the use of the DS0 bit in the Time Slot/Group Map. This mode is
considered to be DS0 extraction mode.
Reserved
Reserved
Mindspeed Technologies™
Advance Information
Description
The CX28560 Memory Organization
5
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