cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 235
cx28560
Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28560.pdf
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D.1
28560-DSH-001-B
Connection Between CX28560 and Other TSBUS
Device
Appendix D: TSBUS
This section details the signals required to implement the TSBUS Interface.
Figure D-1
CX28560. The signals required are summarized in
consists of the Payload and the Overhead bus. Each bus has a Transmit and Receive
path. The receive path is defined from the other device to CX28560, and the transmit
path is defined from CX28560 to the other device.
CX28560 can only generate the TSB_TSYNCI signal during non-stuffed transmit
payload time slots. CX28560 must not generate the TSB_TSYNCI signal during
stuffed transmit payload time slots. A stuffed transmit payload time slot is defined as
the eighth TSBUS payload byte following the assertion of a payload transmit STUFF
signal.
illustrates the TSBUS connections between the other device and
Mindspeed Technologies™
Advance Information
Tables D-1
and D-2. The TSBUS
D
-
1
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