cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 44

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

Introduction
Table 1-10. PCI Interface (2 of 2)
1-26
PERR
SERR
REQ
GNT
INTA
PRST
Note(s):
(1)
The CX28560 does not input SERR. It is assumed that the host will reset CX28560 in the case of a catastrophic system error.
Pin Name
I/O
I/O
I/O
O
O
I
I
PCLK
PCLK
PCLK
PCLK
PCLK
None
Ref Clk
Mindspeed Technologies™
Parity Error (PERR). PERR* is asserted by the agent receiving data when it
detects a parity error on a data phase. It is asserted one clock after PAR is driven,
which is two clocks after the AD and CBE parity was checked.
If the CX28560 masters a PCI write cycle, and—after supplying the data during
the data phase of the cycle—detects this signal being asserted by the agent
receiving the data, then the CX28560 generates a PERR interrupt.
If CX28560 masters a PCI read cycle, and—after receiving the data during the
data phase of the cycle—calculates that a parity error has occurred, the CX28560
asserts this signal and also generates the PERR Interrupt Descriptor towards the
host.
System Error (SERR). Any PCI device can assert SERR to indicate a parity error
on the address cycle or parity error on the data cycle of a special cycle command
or any other system error where the result will be catastrophic. The CX28560
asserts SERR if it detects a parity error on the address cycle or encounters an
abort condition while operating as a PCI master. Since SERR is not a sustained
three-state signal, restoring it to the deasserted state is done with a weak pull-up
(same value as used for sustained three state)
PCI Bus Request (REQ). The CX28560 drives REQ to notify the PCI arbiter that it
desires to master the bus. Every master in the system has its own REQ.
PCI Bus Grant (GNT). The PCI bus arbiter asserts GNT when the CX28560 is free
to take control of the bus, assert FRAME, and execute a bus cycle. Every master
in the system has its own GNT.
PCI CX28560 Interrupt (INTA). INTA is driven by the CX28560 to indicate a
Layer 2 interrupt condition to the host processor.
PCI Reset (PRST). This input resets all functions on the CX28560.
Advance Information
Description
(1)
.
CX28560 Data Sheet
28560-DSH-001-B