cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 57
cx28560
Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28560.pdf
(274 pages)
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CX28560 Data Sheet
2.2.1.5
Table 2-6. Register 4, Address 10h
2.2.1.6
Table 2-7. Register 5–10, Address 14h–28h
2.2.1.7
Table 2-8. Register 11, Address 2Ch
2.2.1.8
Table 2-9. Register 12
28560-DSH-001-B
Bit Field
31:20
19:4
3
2:1
0
Bit Field
Bit Field
31:16
15:0
Bit Field
31:0
31:0
CX28560 Base
Address Register
Subsystem ID
Subsystem Vendor ID
Reserved
Name
Name
Reserved
Description
—
—
—
—
Name
–
14, Address 30h
Register 4, Address 10h
Register 5–10, Address 14h–28h
Register 11, Address 2Ch
Register 12–14, Address 30h–38h
Reset
Value
Reset
Value
0
0
0
0
0
0
Reset
Value
–
8563 = 2047 Channel HDLC Controller
14F1
0
38h
Mindspeed Technologies™
Type
Type
RW
RO
RO
RO
RO
RO
Type
RO
Advance Information
Allows for 1 MB-bounded PCI bus address space to be blocked off as the
CX28560 space. The CX28560 will respond as a PCI slave with DEVSEL*
to all memory cycles whose address bits 31:20 match the value of bits
31:20 of this register, and those upper address bits are non-zero, and
memory space is enabled in the Register 1, COMMAND bit field.
Reads to addresses within this space that are not implemented read back
0; writes have no effect.
When appended to bits 31:20, these bits specify a 1 MB bound memory
range. 1 MB is the only amount of address space that a CX28560 can be
assigned.
The CX28560 memory space is not prefetchable.
The CX28560 can be located anywhere in 32-bit address space.
This base register is a memory space base register, as opposed to I/O
mapped.
Reset Value
Description
Description
Unused
Description
Unused
Type
RO
RO
Host Interfaces
2
-
11
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