cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 237
cx28560
Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28560.pdf
(274 pages)
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CX28560 Data Sheet
Table D-1. System Side Interface: Payload Time Slot Bus
Table D-2. System Side Interface: Overhead Time Slot Bus
28560-DSH-001-B
TSB_ORSTUFF
TSB_OTSTUFF
TSB_RSTUFF
TSB_TSTUFF
TSB_ORDAT
TSB_OTDAT
TSB_RDAT
TSB_OCLK
TSB_OSTB
TSB_TDAT
TSB_CLK
TSB_STB
Symbol
Symbol
Reset Behavior
Reset Behavior
High
High
High
High
Low
Low
Low
Low
Low
Low
—
—
OUT Payload Time Slot Bus Clock: This clock is based on SIB_TXHSCLK. It is used for all
OUT Payload Time Slot Bus Strobe: A strobe signal that indicates the start of a frame with
OUT Payload Time Slot Bus Transmit Stuff Indication: When high, indicates a stuff byte
OUT Payload Time Slot Bus Receive Data: This is the received serial payload data. It is
OUT Payload Time Slot Bus Receive Stuff Indication: When high, indicates that data on
OUT Payload Time Slot Bus Clock: This clock is based on SIB_TXHSCLK. It is used for all
OUT Payload Time Slot Bus Strobe: A strobe signal that indicates the start of a frame with
OUT Payload Time Slot Bus Transmit Stuff Indication: When high, indicates a stuff byte
OUT Payload Time Slot Bus Receive Data: This is the received serial payload data. It is
OUT Payload Time Slot Bus Receive Stuff Indication: When high, indicates that data on
I/O
I/O
IN
IN
Mindspeed Technologies™
timing on the Payload Time Slot Bus.
Clock Rate is 51.84 Mbps (±20 ppm)
84 time slots carrying payload data. The Strobe indicates the beginning of each
Payload time slot Frame.
Payload Time Slot Bus Transmit Data: This is the serial payload data to be received by
TSBUS. This signal is sampled on the rising edge of TSB_CLK.
must be transmitted in place of the data byte arriving 8 time slots later.
transmitted from TBUS on the rising edge of TSB_CLK.
TSB_RDAT is not valid data. TSB_RDAT is stuffed with all 1s.
timing on the Payload Time Slot Bus.
Clock Rate is 51.84 Mbps (±20 ppm)
84 time slots carrying payload data. The Strobe indicates the beginning of each
Payload time slot Frame.
Payload Time Slot Bus Transmit Data: This is the serial payload data to be received by
TSBUS. This signal is sampled on the rising edge of TSB_CLK.
must be transmitted in place of the data byte arriving 8 time slots later.
transmitted from TSBUS on the rising edge of TSB_CLK.
TSB_RDAT is not valid data. TSB_RDAT is stuffed with all 1s.
Advance Information
Definition
Definition
TSBUS
D
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3
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