cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 166

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cx28560

Manufacturer Part Number
cx28560
Description
Hdlc Controller
Manufacturer
Mindspeed Technologies
Datasheet
Basic Operations
7.2.8.3
7.2.9
7.2.9.1
7-8
Receive Errors
Effects:
NOTE:
Channel-Level Recovery Action:
Buffer Controller Channel FIFO Overflow (BOVFLW)
Reason:
Effects:
Channel-Level Recovery Actions:
Receive errors are service-affecting, but do not require corrective action by the host to
resume normal processing.
Receive Overflow (BUFF)
The RSLP receives a signal from the RSIU that more data bits are available to be
stored, but the RSLP channel FIFO is already full.
Reasons:
• Causes serial interface to enter COFA condition until a TSYNC/TSTB pulse
• For every active channel on the respective port, TSLP places channels into the
• Transmit COFA Interrupt (if COFAIEN = 1 in
• Transmit output is three-stated.
• Transmit channel reactivation is required on receiving the Transmit COFA
• Degradation of the host subsystem or application software.
• Incorrect calculation of the size of internal FIFO required.
• Semi-deactivation of the channel. No further data will be transmitted on the
• The affected channel should be deactivated and reactivated if required.
• Degradation of host subsystem performance. This will be caused by host
• Size of RBUFFC internal FIFO insufficient.
arrives and is followed by at least the assigned number of time slots for this
port, without another unexpected TSYNC/TSTB pulse.
deactivate state. Wherein, TSLP sends a repetitive abort sequence of 16
consecutive 1s.
Configuration register).
COFA interrupt is generated immediately. To synchronize the host’s response
to a COFA condition, a COFA Recovery interrupt is also provided.
Recovery (CREC) interrupt.
channel, and, if the overflow occurred mid-message, the last message in the
internal FIFO that was stored before the overflow occurred will be aborted.
assertion of back-pressure on the Data POS-PHY, not allowing the RBUFFC
to transmit the data to the host, thus filling the receive buffers.
Mindspeed Technologies™
Advance Information
Chapter
5.0, TSIU Time Slot
CX28560 Data Sheet
28560-DSH-001-B

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