cx28560 Mindspeed Technologies, cx28560 Datasheet - Page 261

• Manufacturer Part Number: cx28560
• Description: Hdlc Controller
• Manufacturer: Mindspeed Technologies

CX28560 Data Sheet
E.5.3
E.5.3.1
Table E-2. Servicing Sequence
28560-DSH-001-B
Stage
(D)
(A)
(B)
(C)
(E)
Example
Start position
FRAGLEN out
½ FRAGLEN in
1 out
½ FRAGLEN in
Because the minimum buffer size required per channel is dependent on a number of
independent parameters (minimum packet size, existence of mid-range channels,
likeness of channels configured), the next paragraph provides an example for the
calculation of the minimum buffer size. It is recommended that the characteristics of
the system be decided and the buffer size be calculated according to these
characteristics.
Channels of Same Bit Rate, Large Minimum Packet Size
In this example, the bit-rate of the channel and mid-range considerations are
irrelevant, because the Flexiframe will be a simple list of the channels. Hence the
above calculation is overkill. For fragments of length FRAGLEN bytes, the time
between two consecutive services is guaranteed to be less than the time a channel will
take to accumulate 1/2 FRAGLEN bytes of data. Assuming that the minimum packet
length (MINPKTLEN) is less than the fragment length, and that initially there is one
fragment and 2 missed services, the sequence of servicing in
the equation for the number of channels configurable for a specified FRAGLEN.
Since we start with both less data and less FIFO bytes, we can assume convergence.
Assuming that the minimum fragment size is 32 bytes, the minimum buffer size
required is created in stage (A), i.e., that of 2 * FRAGLEN + 12.
NOTE:
From this equation and the fact that there is 384 KB of memory available for
allocation between channels, the maximum number of channels configurable for a
specific fragment size can be calculated:
NOTE:
An additional 4 bytes should be added if, during the configured slot time, a
channel can accumulate an extra byte of data.
If the minimum packet size is known to be smaller than the fragment size, this
may affect the size of buffer required for each channel and this should be taken
into account.
Action
Mindspeed Technologies™
Advance Information
FRAGLEN, 1, FRAGLEN – 1
1, FRAGLEN, 1, (1/2 FRAGLEN –1)
FRAGLEN, 1, (1/2 FRAGLEN –2)
FRAGLEN, 1, (FRAGLEN –2)
1, FRAGLEN -1
Number of Channels Configurable = (384 * 1024)
/ (2 * FRAGLEN + 12 + 4)
Buffer Content (Services)
Buffer Controller FIFO Size Calculation
2 * FRAGLEN + 3 * 4
FRAGLEN + 2 * 4
(3 / 2)FRAGLEN + 4 * 4
(3 / 2)FRAGLEN – 1 + 4 *4
2 * FRAGLEN – 1 + 3 * 4
Buffer Content (Bytes)
Table E-2
will lead to
E
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11