PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 111

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PEB2256E

Manufacturer Part Number
PEB2256E
Description
E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
4.5.2.1
The pulse length of SYPX is always the basic E1 bit width (488 ns), independent of the
selected system highway clock and data frequency.
SYPX Offset Calculation
T:
SD:
SC:
X:
0
5
Data Sheet
T
T
4:
T
Time between beginning of SYPX pulse and beginning of next frame
(time slot 0, bit 0), measured in number of SCLKX clock intervals
maximum delay: T
Basic data rate; 2.048 Mbit/s
System clock rate; 2.048, 4.096, 8.192, or 16.384 MHz
Programming value to be written to registers XC0 and XC1 (see
max
Transmit Offset Programming
: X = 256
X = 4 - T
SC/SD - T + 4
max
= (256
SC/SD) - 1
111
Functional Description E1
FALC56 V1.2
page
PEB 2256
2002-08-27
237).

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