PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 193

• Manufacturer Part Number: PEB2256E
• Description: E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
• Manufacturer: INFINEON [Infineon Technologies AG]

Table 50
IMR0.RME = 0
IMR0.RPF = 0
IMR1.XPR = 0
IMR4.RME2=0
IMR4.RPF2=0
IMR5.XPR2=0
IMR5.RME3=0
IMR5.RPF3=0
IMR5.XPR3=0
RTR3.TS16 = 1
TTR3.TS16 = 1
TSEO = 00
TSBS1 = FF
TSBS2= FF
TSBS3= FF
TSS2= 01
TSS3= 02
Table 51
XSP.CASEN = 1
CCR1.EITS = 0
IMR0.CASC = 0
Note: After the device initialization a software reset should be executed by setting
Data Sheet
of bits CMDR.XRES/RRES.
H
H
H
H
H
H
HDLC Controller Initialization (E1) (cont’d)
CAS-CC Initialization (E1)
Unmask interrupts for HDLC processor requests.
Select TS16 for HDLC data reception and transmission.
Even and odd frames are used for HDLC reception and
transmission.
Select all bits of selected time slot (channel 1).
Select all bits of selected time slot (channel 2).
Select all bits of selected time slot (channel 3).
Select time slot 1 for HDLC channel 2.
Select time slot 2 for HDLC channel 3.
Send CAS info stored in the XS(16:1) registers.
Enable interrupt with any data change in the RS(16:1) registers.
193
Operational Description E1
FALC56 V1.2
PEB 2256
2002-08-27