PEB2256E INFINEON [Infineon Technologies AG], PEB2256E Datasheet - Page 364

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PEB2256E

Manufacturer Part Number
PEB2256E
Description
E1/T1/J1 Framer and Line Interface Component for Long and Short Haul Applications
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
Idle Channel Register (Read/Write)
Value after reset: 00
ICB1
ICB2
ICB3
IC(24:1)
Line Interface Mode 0 (Read/Write)
Value after reset: 00
LIM0
XFB
Data Sheet
IC17
XFB
IC1
IC9
7
7
Idle Channel Selection Bits
These bits define the channels (time slots) of the outgoing PCM frame
to be altered.
0 =
1 =
Transmit Full Bauded Mode
Only applicable for dual-rail mode (bit LIM1.DRS = 1).
0 =
1 =
Note: If CMI coding is selected (FMR0.XC(1:0) = 01) this bit has to
XDOS
IC10
IC18
IC2
H
H
, 00
Output signals XDOP/XDON are half bauded (normal
operation).
Output signals XDOP/XDON are full bauded.
Normal operation.
Idle channel mode. The contents of the selected channel is
overwritten by the idle channel code defined by register IDLE.
H
be cleared.
, 00
IC11
IC19
IC3
H
, 00
H
IC12
IC20
IC4
364
EQON
IC13
IC21
IC5
IC14
IC22
RLM
IC6
IC15
IC23
IC7
LL
T1/J1 Registers
FALC56 V1.2
MAS
IC16
IC24
IC8
0
0
PEB 2256
2002-08-27
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