SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 121

• Manufacturer Part Number: SAB80C517-M16
• Description: 8-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Action:
Select compare mode 1 (CMSEL.x = 0).
Move the compare value for the first timer
period to the compare register CMx (high
byte first).
Switch on compare mode 0 (CMSEL.x = 1).
Move the compere value for the second
timer period to the compare register.
Enable the compare function
(CMEN.x = 1)
Set up the prescaler for the compare timer.
Set specific compare output to low level
(CLR P4.x)
Start the compare timer with a desired value
(write-to-CTREL)
Second Configuration
CMx Registers Assigned to Timer 2
Any CMx register switched to timer 2 as a time base operates in compare mode 1. In this case CMx
registers behave like any other compare register connected to timer 2 (e.g. the CRC or CCx
registers). Please refer to the above description of compare mode 1 for further details.
Since there are no dedicated interrupts for the CMx compare outputs, again a buffered compare
register structure is used to determine an exact 16-bit wide loading of the compare value: the
compare value is transferred to the actual compare latches at a write-to-CMLx instruction (low byte
of CMx). Thus, the CMx register is to be written in a fixed order, too: high byte first, low byte second.
lf the high byte may remain unchanged it is sufficient to load only the low byte. See figure 7-52,
block diagram of a CMx register connected to timer 2.
Semiconductor Group
122
Comment:
This is also the default value after reset.
In compare mode 1 latch is loaded directly
after a write-to-CMLx. Thus the value slips
directly into the compare latch.
Now select the rigth compare mode.
The register latch is loaded. This value is
used after the first timer overflow.
The compare output is switched to low level.
Compare function is initialized.
The output will oscillate.
On-Chip Peripheral Components