SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 84

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SAB80C517-M16

Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
An externally controlled conversion can be achieved by setting the bit ADEX. In this mode on single
conversion is triggered by a 1-to-0 transition at pin P6.0/ADST, if ADM is 0. P6.0/ADST is sampled
suring S5P2 of every machine cycle. When the samples show a logic high in one cycle and a logic
low in the next cycle the transition is detected and the conversion is started. When ADM and ADEX
is set, a continuous conversion is started when pin P6.0/ADST sees a low level; the conversion is
stopped when the pin P6.0/ADST goes back to high. The last commenced conversion during low
level will be completed.
The busy flag BSY (ADCON0.4) is automatically set when a conversion is in progress. After
completion of the conversion it is reset by hardware. This flag can be read only, a write has no
effect.There is also an interrupt request flag IADC (IRCON.0) that is set when a conversion is
completed. See section 8 for more details about the interrupt structure.
Figure 7-26
Special Function Register ADCON0 (Address 0D8 H )
Bit
MX0
MX1
MX2
MX3
ADM
BSY
ADEX
Figure 7-27
Special Function RegisterADCON1 (Address 0DC H )
A/D converter control register 1. It contains channel selection bits MX0 to MX3. Bits MX0 to MX2
can be written or read either in ADCON0 or in ADCON1.
Semiconductor Group
0DC H
0D8 H
0DF H
BD
These bits are not used in controlling A/D converter functions.
0DE H
Function
Select 12 input channels of the A/D converter.
A/D conversion mode. When set, a continuous conversion is selected. If
ADM = 0, the converter stops after one conversion.
Busy flag. This flag indicates whether a conversion is in progress
(BSY = 1). The flag is cleared by hardware when the conversion is
completed.
Internal/external start of conversion. When set, the external start of
conversion by P6.0/ADST is enabled.
CLK
0DD H 0DC H
ADEX
BSY
85
0DB H
ADM
MX3
On-Chip Peripheral Components
0DA H
MX2
MX2
0D9 H
MX1
MX1
0D8 H
MX0
MX0
ADCON0
ACON1

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