SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 141

• Manufacturer Part Number: SAB80C517-M16
• Description: 8-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

On-Chip Peripheral Components
Starting the Watchdog Timer
There are two ways to start the watchdog timer depending on the level applied to pin PE/SWD
(pin 4). This pin serves two functions, because it is also used for blocking the power saving modes.
For details see chapter 7.7.
– The First Possibility of Starting the Watchdog Timer
The automatic start of the watchdog timer directly after an external HW reset is a hardware start
V
initialized by strapping pin 4 (PE/SWD) to
. In this case the power-saving modes (power-down
CC
mode, idle mode and slow-down mode) are also disabled and cannot be started by software.
The self-start of the watchdog timer by a pin option has been implemented to provide high system
security in electrically very noisy environments.
Note:
The automatic start of the watchdog timer is only performed if PE/SWD (power-save enable/start
watchdog timer) is held at high level while reset is active. A positive transition at this pin during
normal program execution will not start the watchdog timer.
Furthermore, when using the hardware start, the watchdog timer starts running with its default time-
out period. The value in the reload register WDTREL, however, can be overwritten at any time to
set any time-out period desired.
– The Second Possibility of Starting the Watchdog Timer
The watchdog timer can also be started by software. This method is compatible to the start
procedure in the SAB 80(C)515. Only setting of bit SWDT in special function register IEN1 (figure
7-61) starts the watchdog timer. Starting the watchdog timer does not automatically reload the
WDTREL register into the watchdog timer registers WDTL/WDTH. A reload of WDTREL occurs
only when using the double instruction refresh sequence SETB WDT/SETB SWDT. Using the
software start, the time-out period can be programmed before the watchdog timer starts running.
Note that once the watchdog timer has been started it cannot be stopped by anything but an
external hardware reset through pin 10 with a low level applied to pin PE/SWD.
Refreshing the Watchdog Timer
At the same time the watchdog timer is started, the 7-bit register WDTH is preset by the contents
of WDTREL.0 to WDTREL.6. Once started the watchdog cannot be stopped by software but can
only be refreshed to the reload value by first setting bit WDT (IEN0.6) and by the next instruction
setting SWDT (IEN1.6). Bit WDT will automatically be cleared during the second machine cycle
after having been set. For this reason, setting SWDT bit has to be a one cycle instruction (e.g. SETB
SWDT). This double-instruction refresh of the watchdog timer is implemented to minimize the
chance of an unintentional reset of the watchdog.
Semiconductor Group
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