SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 136

• Manufacturer Part Number: SAB80C517-M16
• Description: 8-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Table 7-13
Status of External Pins During Idle and Power-Down Mode
Outputs
ALE
PSEN
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 6
The watchdog timer is the only peripheral which is automatically stopped during idle. The idle mode
makes it possible to "freeze" the processor’s status for a certain time or until an external event
causes the controller to go back into normal operating mode. Since the watchdog timer is stopped
during idle mode, this useful feature of the SAB 80C517 is provided even if the watchdog function
is used simultaneously.
lf the idle mode is to be used the pin PE/SWD must be held low. Entering the idle mode is to be
done by two consecutive instructions immediately following each other. The first instruction has to
set the flag bit IDLE (PCON.0) and must not set bit IDLS (PCON.5), the following instruction has to
set the start bit IDLS (PCON.5) and must not set bit IDLE (PCON.0). The hardware ensures that a
concurrent setting of both bits, IDLE and IDLS will not initiate the idle mode. Bits IDLE and IDLS will
automatically be cleared after having been set. lf one of these register bits is read the value shown
is zero (0). Figure 7-57 shows special function register PCON. This double-instruction sequence is
implemented to minimize the chance of unintentionally entering the idle mode.
Note that PCON is not a bit-addressable register, so the above mentioned sequence for entering
the idle mode is to be done by byte handling instructions.
Semiconductor Group
Idle
High
High
Data
Data/alternate
outputs
Data
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Last Instruction Executed from
Internal Code Memory
Power-down
Low
Low
Data
Data/
last output
Data
Data/
last output
Data
last output
Data/
last output
Data/
last output
137
On-Chip Peripheral Components
Idle
High
High
Float
Data/alternate
outputs
Address
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Data/alternate
outputs
Last Instruction Executed from
External Code Memory
Power-down
Low
Low
Float
Data/
last output
Data
Data/
last output
Data/
last output
Data/
last output
Data/
last output