SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 123
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SAB80C517-M16
Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.SAB80C517-M16.pdf
(323 pages)
- Current page: 123 of 323
- Download datasheet (4Mb)
On-Chip Peripheral Components
In both cases the appropriate port 1 pin is used as input and the port latch must be programmed to
contain a one (1). The external input is sampled in every machine cycle. When the sampled input
shows a low (high) level in one cycle and a high (low) in the next cycle, a transition is recognized.
The timer 2 contents is latched to the appropriate capture register in the cycle following the one in
which the transition was identified.
In mode 0 a transition at the external capture inputs of registers CC0 to CC4 will also set the
corresponding external interrupt request flags IEX2 to IEX6. lf the interrupts are enabled, an
external capture signal will cause the CPU to vector to the appropriate interrupt service routine.
In mode 1 a capture occurs in response to a write instruction to the low order byte of a capture
register. The write-to-register signal (e.g. write-to-CRCL) is used to initiate a capture. The value
written to the dedicated capture register is irrelevant for this function. The timer 2 contents will be
latched into the appropriate capture register in the cycle following the write instruction. In this mode
no interrupt request will be generated.
Figures 7-53 and 7-54 show functional diagrams of the capture function of timer 2. Figure 7-53
illustrates the operation of the CRC or CC4 register, while figure 7-54 shows the operation of the
compare/capture registers 1 to 3.
The two capture modes can be established individually for each capture register by bits in SFR
CCEN (compare/capture enable register) and CC4EN (compare/capture 4 enable register). That
means, in contrast to the compare modes, it is possible to simultaneously select mode 0 for one
capture register and mode 1 for another register . The bit positions and functions of CCEN are listed
in figure 7-41, the one for CC4EN in figure 7-47.
Semiconductor Group
124
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