SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 261

• Manufacturer Part Number: SAB80C517-M16
• Description: 8-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Application Examples
Figure 10-3
Program Flow Charts
The interrupt routine takes full advantage of the TOC loading.
The interrupt routine is always vectored to some time after a compare timer overflow. This means
that the new compare value is moved to CM0 at an undefined moment in the current timer period.
The moment depends on the interrupt response time (uncertainty of 3 to 9 machine cycles) and on
the length of the interrupt routine itself (perhaps there are more channels to serve), etc. Without any
further provisions (like the TOC loading) there would be no chance for loading an early compare
value (e.g. CM0 = 0000 H ) because the timer would have passed these early counts before the
loading was completed.
The TOC loading now solves the above problem. The interrupt service routine is always "thinking"
one cycle in advance. It actually loads the compare value (or sample point) for the next timer period.
Thus, the CPU has one full timer period to serve all compares.
The compare value loaded to the CM0 register by the interrupt routine will be immediately
transferred to the actual compare latch at the next compare timer overflow. This overflow then again
requests a new interrupt service routine.
Semiconductor Group
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