SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 137
SAB80C517-M16
Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.SAB80C517-M16.pdf
(323 pages)
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The following instruction sequence may serve as an exemple:
ORL
ORL
The instruction that sets bit IDLS is the last instruction executed before going into idle mode.
Terminating the Idle Mode
Figure 7-57
Special Function Register PCON (Address 87 H )
Bit
PDS
IDLS
SD
GF1
GF0
PDE
IDLE
Semiconductor Group
– The idle mode can be terminated by activation of any enabled interrupt. The CPU operation
– The other possibility of terminating the idle mode is a hardware reset. Since the oscillator is
is resumed, the interrupt will be serviced and the next instruction to be executed after the RETI
instruction will be the one following the instruction that set the bit IDLS.
still running, the hardware reset is held active for only two machine cycles for a complete
reset.
87 H
PCON,#00000001B
PCON,#00100000B
SMOD
These bits are not used in controlling the power saving modes
PDS
Function
Power-down start bit. The instruction that sets the PDS flag bit is the last
instruction before entering the power-down mode.
IDLE start bit. The instruction that sets the IDSL flag bit is the last
instruction before entering the idle mode.
When set, the slow-down mode is enabled.
General purpose flag
General purpose flag
Power-down enable bit. When set, starting the power-down mode is
enabled.
Idle mode enable bit. When set, starting the idle mode is enabled.
;Set bit IDLE,
;bit IDLS must not be set
;Set bit IDLS,
;bit IDLE must not be set
IDLS
SD
138
GF1
On-Chip Peripheral Components
GF0
PDE
IDLE
PCON
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