SAB80C517-M16 SIEMENS [Siemens Semiconductor Group], SAB80C517-M16 Datasheet - Page 140
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SAB80C517-M16
Manufacturer Part Number
SAB80C517-M16
Description
8-Bit CMOS Single-Chip Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.SAB80C517-M16.pdf
(323 pages)
- Current page: 140 of 323
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7.8
The SAB 80C517 offers two on-chip peripherals which monitor the program flow and ensure an
automatic "fail-safe" reaction for cases where the controller’s hardware fails or the software hangs
up:
7.8.1
To protect the system against software upset, the user’s program has to clear this watchdog within
a previously programmed time period. lf the software fails to do this periodical refresh of the
watchdog timer, an internal hardware reset will be initiated. The software can be designed so that
the watchdog times out if the program does not work properly. lt also times out if a software error is
based on hardware-related problems.
The watchdog timer in the SAB 80C517 is a 15-bit timer, which is incremented by a count rate of
either
arrangement of two prescalers, a divide-by-two and a divide-by-16 prescaler (see figure 7-58). The
latter is enabled by setting bit WDTREL.7.
Immediately after start (see next section for the start procedure), the watchdog timer is initialized to
the reload value programmed to WDTREL.0 - WDTREL.6. After an external HW or HWPD reset,
an oscillator power on reset, or a watchdog timer reset, register WDTREL is cleared to 00 H . The
lower seven bits of WDTREL can be loaded by software at any time.
Examples (given for a 12-MHz oscillator frequency):
WDTREL =
00 H
80 H
7F H
Semiconductor Group
– A programmable watchdog timer (WDT) with variable time-out period from 512 microseconds
– An oscillator watchdog (OWD) which monitors the on-chip oscillator and forces the
up to approx. 1.1 seconds at 12 MHz.
The SAB 80C517’s WDT is a superset of the SAB 80515 watchdog.
microcontroller into the reset state if the on-chip oscillator fails.
f
CYCLE
Fail Save Mechanisms
Programmable Watchdog Timer
/2 or
f
CYCLE
/32 (
Time-Out Period
65.535 ms
1.1 s
512 s
f
CYCLE
=
f
OSC
/12). That is, the machine clock is divided by a series
141
On-Chip Peripheral Components
Comments
This is the default value and
coincides with the watchdog
period of the SAB 80515
Maximum time period
Minimum time period
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