HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 126

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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6.4.5
The flash memory is controlled by means of the pins shown in table 6.7.
Table 6.7
Pin Name
Programming power
Mode pin
Transmit data
Receive data
The transmit data pin and receive data pin are used in boot mode.
6.4.6
The registers used to control the on-chip flash memory are shown in table 6.8.
Table 6.8
Register Name
Flash memory control register
Erase block register 1
Erase block register 2
The FLMCR, EBR1, and EBR2 registers are valid only when programming and erasing flash
memory, and can only be accessed when 12 V is applied to the FV
applied to the FV
H'FF.
Pin Configuration
Register Configuration
Flash Memory Pins
Flash Memory Registers
PP
pin, addresses H'FF80 to H'FF83 cannot be modified and are always read as
Abbreviation
FV
TEST
TXD
RXD
PP
Abbreviation
FLMCR
EBR1
EBR2
Power supply
Input/Output
Input
Output
Input
R/W
R/W
R/W
R/W
Initial Value
H'00
H'F0
H'00
Function
Apply 12.0 V
Sets H8/3644F operating mode
SCI3 transmit data output
SCI3 receive data input
PP
pin. When 12 V is not
Address
H'FF80
H'FF82
H'FF83
117

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