HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 137

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

7. If the TEST pin input level is changed (e.g. from 0 V to 5 V to 12 V) during a reset (while a
8. Regarding 12 V application to the FV
Note: * For further information on V
6.6.2
When set to user program mode, the H8/3644F, H8/3643F, or H8/3642AF can program and erase
its flash memory by executing a user program. Therefore, on-board reprogramming of the on-chip
flash memory can be carried out by providing on-board means of supplying V
data, and storing an on-board reprogramming program in part of the program area.
User program mode is selected by applying 12 V to the FV
accessed, during a reset or after confirming that a reset has been performed properly (after the
reset is released).
The flash memory cannot be read while being programmed or erased, so the on-board
reprogramming program or flash memory reprogramming routine should be transferred to the
RAM area, and on-board reprogramming executed in that area.
128
Also, do not release or cut V
flash memory*.
Boot mode can be exited by driving the reset pin low, then releasing 12 V application to the
TEST pin and FV
release the reset.
However, external pin settings must not be changed during boot mode execution.
Note that the boot mode state is not maintained if 12 V application to the TEST pin is released
while in boot mode.
Also, if a watchdog timer reset occurs in this boot mode state, the built-in boot program will be
restarted without clearing the MCU’s internal mode state.
low level is being input at the RES pin), port states will change as a result of the change of
MCU operating mode. Therefore, care must be taken to make pin settings to prevent these pins
from becoming output signal pins during a reset, and to prevent collision with signals outside
the MCU.
exceed the maximum rating of 13 V.
Also, be sure to connect bypass capacitors to the FV
Flash Memory Programming and Erasing Precautions.
User Program Mode
PP
pin at least 10 system clock cycles later, and setting the TEST pin to V
PP
during boot mode execution or when programming or erasing
PP
application, release, and cut-off, see note 5 in section 6.9,
PP
and TEST pins, insure that peak overshoot does not
PP
and TEST pins.
PP
pin when flash memory is not being
PP
and programming
SS
to