HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 257

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Timer Interrupt Enable Register (TIER)
TIER is an 8-bit read/write register that enables or disables interrupt requests.
TIER is initialized to H'01 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Bit 7—Input Capture Interrupt A Enable (ICIAE): Bit 7 enables or disables the ICIA interrupt
requested when ICFA is set to 1 in TCSRX.
Bit 7: ICIAE
0
1
Bit 6—Input Capture Interrupt B Enable (ICIBE): Bit 6 enables or disables the ICIB interrupt
requested when ICFB is set to 1 in TCSRX.
Bit 6: ICIBE
0
1
Bit 5—Input Capture Interrupt C Enable (ICICE): Bit 5 enables or disables the ICIC interrupt
requested when ICFC is set to 1 in TCSRX.
Bit 5: ICICE
0
1
Bit
Initial value
Read/Write
ICIAE
R/W
Description
Interrupt request by ICFA (ICIA) is disabled
Interrupt request by ICFA (ICIA) is enabled
Description
Interrupt request by ICFB (ICIB) is disabled
Interrupt request by ICFB (ICIB) is enabled
Description
Interrupt request by ICFC (ICIC) is disabled
Interrupt request by ICFC (ICIC) is enabled
7
0
ICIBE
R/W
6
0
ICICE
R/W
5
0
ICIDE
R/W
4
0
OCIAE
R/W
3
0
OCIBE
R/W
2
0
OVIE
R/W
1
0
(initial value)
(initial value)
(initial value)
—
—
0
1
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