HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 258

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bit 4—Input Capture Interrupt D Enable (ICIDE): Bit 4 enables or disables the ICID interrupt
requested when ICFD is set to 1 in TCSRX.
Bit 4: ICIDE
0
1
Bit 3—Output Compare Interrupt A Enable (OCIAE): Bit 3 enables or disables the OCIA
interrupt requested when OCFA is set to 1 in TCSRX.
Bit 3: OCIAE
0
1
Bit 2—Output Compare Interrupt B Enable (OCIBE): Bit 2 enables or disables the OCIB
interrupt requested when OCFB is set to 1 in TCSRX.
Bit 2: OCIBE
0
1
Bit 1—Timer Overflow Interrupt Enable (OVIE): Bit 1 enables or disables the FOVI interrupt
requested when OVF is set to 1 in TCSRX.
Bit 1: OVIE
0
1
Bit 0—Reserved Bit: Bit 0 is reserved; it is always read as 1, and cannot be modified.
Timer Control/Status Register X (TCSRX)
Note: * Bits 7 to 1 can only be written with 0 for flag clearing.
TCSRX is an 8-bit register that selects clearing of the counter and controls interrupt request
signals.
250
Bit
Initial value
Read/Write
R/(W)*
ICFA
Description
Interrupt request by ICFD (ICID) is disabled
Interrupt request by ICFD (ICID) is enabled
Description
Interrupt request by OCFA (OCIA) is disabled
Interrupt request by OCFA (OCIA) is enabled
Description
Interrupt request by OCFB (OCIB) is disabled
Interrupt request by OCFB (OCIB) is enabled
Description
Interrupt request by OVF (FOVI) is disabled
Interrupt request by OVF (FOVI) is enabled
7
0
R/(W)*
ICFB
6
0
R/(W)*
ICFC
5
0
R/(W)*
ICFD
4
0
R/(W)*
OCFA
3
0
R/(W)*
OCFB
2
0
R/(W)*
OVF
1
0
(initial value)
(initial value)
(initial value)
(initial value)
CCLRA
R/W
0
0