HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 219

• Manufacturer Part Number: HD6433640
• Description: H8/3644 Series Hardware Manual
• Manufacturer: HITACHI [Hitachi Semiconductor]

Bits 3 to 0—Internal Clock Select (TMA3 to TMA0): Bits 3 to 0 select the clock input to TCA.
The selection is made as follows.
Bit 3:
TMA3
0
1
Timer Counter A (TCA)
TCA is an 8-bit read-only up-counter, which is incremented by internal clock input. The clock
source for input to this counter is selected by bits TMA3 to TMA0 in timer mode register A
(TMA). TCA values can be read by the CPU in active mode, but cannot be read in subactive
mode. When TCA overflows, the IRRTA bit in interrupt request register 1 (IRR1) is set to 1.
TCA is cleared by setting bits TMA3 and TMA2 of TMA to 11.
Upon reset, TCA is initialized to H'00.
Bit
Initial value
Read/Write
Bit 2:
TMA2
0
1
0
1
TCA7
R
7
0
Bit 1:
TMA1
0
1
0
1
0
1
0
1
TCA6
R
6
0
Bit 0:
TMA0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TCA5
R
5
0
Prescaler and Divider Ratio
or Overflow Period
PSS, ø/8192
PSS, ø/4096
PSS, ø/2048
PSS, ø/512
PSS, ø/256
PSS, ø/128
PSS, ø/32
PSS, ø/8
PSW, 1 s
PSW, 0.5 s
PSW, 0.25 s
PSW, 0.03125 s
PSW and TCA are reset
TCA4
R
4
0
TCA3
R
3
0
(initial value)
Description
TCA2
R
2
0
Function
Interval timer
Clock time base
TCA1
R
1
0
TCA0
R
0
0
211