HD6433640 HITACHI [Hitachi Semiconductor], HD6433640 Datasheet - Page 230

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HD6433640

Manufacturer Part Number
HD6433640
Description
H8/3644 Series Hardware Manual
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet

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9.4.2
Timer Counter V (TCNTV)
TCNTV is an 8-bit read/write up-counter which is incremented by internal or external clock input.
The clock source is selected by bits CKS2 to CKS0 in TCRV0. The TCNTV value can be read and
written by the CPU at any time. TCNTV can be cleared by an external reset signal, or by compare
match A or B. The clearing signal is selected by bits CCLR1 and CCLR0 in TCRV0.
When TCNTV overflows from H'FF to H'00, OVF is set to 1 in TCSRV.
TCNTV is initialized to H'00 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Time Constant Registers A and B (TCORA, TCORB)
TCORA and TCORB are 8-bit read/write registers.
TCORA and TCNTV are compared at all times, except during the T
cycle. When the TCORA and TCNTV contents match, CMFA is set to 1 in TCSRV. If CMIEA is
also set to 1 in TCRV0, a CPU interrupt is requested.
Timer output from the TMOV pin can be controlled by a signal resulting from compare match,
according to the settings of bits OS3 to OS0 in TCSRV.
TCORA is initialized to H'FF upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
TCORB is similar to TCORA.
222
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Register Descriptions
TCNTV
TCORn
R/W
R/W
7
0
7
1
7
7
TCNTV
TCORn
R/W
R/W
6
0
6
1
6
6
TCNTV
TCORn
R/W
R/W
5
0
5
1
5
5
TCNTV
TCORn
R/W
R/W
4
0
4
1
4
4
TCNTV
TCORn
R/W
R/W
3
0
3
1
3
3
3
TCNTV
TCORn
state of a TCORA write
R/W
R/W
2
0
2
1
2
2
TCNTV
TCORn
R/W
R/W
1
0
1
1
1
1
n = A or B
TCNTV
TCORn
R/W
R/W
0
0
0
1
0
0

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