ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 178

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ATMEGA325-16AJ

Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Functional Descriptions
Three-wire Mode
178
ATmega325/3250/645/6450
selected from three different sources: The USCK pin, Timer/Counter0 Compare Match
or from software.
The Two-wire clock control unit can generate an interrupt when a start condition is
detected on the Two-wire bus. It can also generate wait states by holding the clock pin
low after a start condition is detected, or after the counter overflows.
The USI Three-wire mode is compliant to the Serial Peripheral Interface (SPI) mode 0
and 1, but does not have the slave select (SS) pin functionality. However, this feature
can be implemented in software if necessary. Pin names used by this mode are: DI, DO,
and USCK.
Figure 77. Three-wire Mode Operation, Simplified Diagram
Figure 77 shows two USI units operating in Three-wire mode, one as Master and one as
Slave. The two Shift Registers are interconnected in such way that after eight USCK
clocks, the data in each register are interchanged. The same clock also increments the
USI’s 4-bit counter. The Counter Overflow (interrupt) Flag, or USIOIF, can therefore be
used to determine when a transfer is completed. The clock is generated by the Master
device software by toggling the USCK pin via the PORT Register or by writing a one to
the USITC bit in USICR.
SLAVE
MASTER
Bit7
Bit7
Bit6
Bit6
Bit5
Bit5
Bit4
Bit4
Bit3
Bit3
Bit2
Bit2
Bit1
Bit1
Bit0
Bit0
PORTxn
USCK
USCK
DO
DO
DI
DI
2570A–AVR–09/04

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