ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 80
ATMEGA325-16AJ
Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA325-16AJ.pdf
(347 pages)
- Current page: 80 of 347
- Download datasheet (3Mb)
8-bit Timer/Counter0
with PWM
Overview
Registers
80
ATmega325/3250/645/6450
Timer/Counter0 is a general purpose, single compare unit, 8-bit Timer/Counter module.
The main features are:
•
•
•
•
•
•
•
A simplified block diagram of the 8-bit Timer/Counter is shown in Figure 27. For the
actual placement of I/O pins, refer to “Pinout ATmega3250/6450” on page 2 and “Pinout
ATmega325/645” on page 3. CPU accessible I/O Registers, including I/O bits and I/O
pins, are shown in bold. The device-specific I/O Register and bit locations are listed in
the “8-bit Timer/Counter Register Description” on page 90.
Figure 27. 8-bit Timer/Counter Block Diagram
The Timer/Counter (TCNT0) and Output Compare Register (OCR0A) are 8-bit registers.
Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the Timer
Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer
Interrupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock
source on the T0 pin. The Clock Select logic block controls which clock source and edge
the Timer/Counter uses to increment (or decrement) its value. The Timer/Counter is
inactive when no clock source is selected. The output from the Clock Select logic is
referred to as the timer clock (clk
The double buffered Output Compare Register (OCR0A) is compared with the
Timer/Counter value at all times. The result of the compare can be used by the Wave-
form Generator to generate a PWM or variable frequency output on the Output Compare
pin (OC0A). See “Output Compare Unit” on page 82. for details. The compare match
Single Compare Unit Counter
Clear Timer on Compare Match (Auto Reload)
Glitch-free, Phase Correct Pulse Width Modulator (PWM)
Frequency Generator
External Event Counter
10-bit Clock Prescaler
Overflow and Compare Match Interrupt Sources (TOV0 and OCF0A)
Timer/Counter
TCNTn
OCRn
=
direction
count
clear
BOTTOM
= 0
T0
).
Control Logic
=
TCCRn
TOP
0xFF
clk
Tn
Generation
Waveform
Clock Select
( From Prescaler )
Detector
Edge
2570A–AVR–09/04
OCn
(Int.Req.)
TOVn
(Int.Req.)
OCn
Tn
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