ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 271

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ATMEGA325-16AJ

Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Serial Programming
Algorithm
2570A–AVR–09/04
When writing serial data to the ATmega325/3250/645/6450, data is clocked on the rising
edge of SCK.
When reading data from the ATmega325/3250/645/6450, data is clocked on the falling
edge of SCK. See Figure 121 for timing details.
To program and verify the ATmega325/3250/645/6450 in the serial programming mode,
the following sequence is recommended (See four byte instruction formats in Table
121):
1. Power-up sequence:
2. Wait for at least 20 ms and enable serial programming by sending the Program-
3. The serial programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time. The page size is found in Table
5.A: The EEPROM array is programmed one byte at a time by supplying the address
6. Any memory location can be verified by using the Read instruction which returns
7. At the end of the programming session, RESET can be set high to commence
Apply power between V
some systems, the programmer can not guarantee that SCK is held low during
power-up. In this case, RESET must be given a positive pulse of at least two
CPU clock cycles duration after SCK has been set to “0”.
ming Enable serial instruction to pin MOSI.
synchronization. When in sync. the second byte (0x53), will echo back when
issuing the third byte of the Programming Enable instruction. Whether the echo
is correct or not, all four bytes of the instruction must be transmitted. If the 0x53
did not echo back, give RESET a positive pulse and issue a new Programming
Enable command.
116 on page 261. The memory page is loaded one byte at a time by supplying
the 6 LSB of the address and data together with the Load Program Memory
Page instruction. To ensure correct loading of the page, the data low byte must
be loaded before data high byte is applied for a given address. The Program
Memory Page is stored by loading the Write Program Memory Page instruction
with the 8 MSB of the address. If polling is not used, the user must wait at least
t
programming interface before the Flash write operation completes can result in
incorrect programming.
and data together with the appropriate Write instruction. An EEPROM memory
location is first automatically erased before new data is written. If polling
(RDY/BSY) is not used, the user must wait at least t
next byte (See Table 120.) In a chip erased device, no 0xFFs in the data file(s)
need to be programmed.
B: The EEPROM array is programmed one page at a time. The Memory page is
loaded one byte at a time by supplying the 2 LSB of the address and data
together with the Load EEPROM Memory Page instruction. The EEPROM Mem-
ory Page is stored by loading the Write EEPROM Memory Page Instruction with
the 4 MSB of the address. When using EEPROM page access only byte loca-
tions loaded with the Load EEPROM Memory Page instruction is altered. The
remaining locations remain unchanged. If polling (RDY/BSY) is not used, the
used must wait at least t
In a chip erased device, no 0xFF in the data file(s) need to be programmed.
the content at the selected address at serial output MISO.
normal operation.
WD_FLASH
before issuing the next page. (See Table 120.) Accessing the serial
WD_EEPROM
CC
and GND while RESET and SCK are set to “0”. In
ATmega325/3250/645/6450
before issuing the next page (See Table 117).
WD_EEPROM
before issuing the
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