ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 43

• Manufacturer Part Number: ATMEGA325-16AJ
• Description: 8-bit Microcontroller with In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Internal Voltage
Reference
Voltage Reference Enable
Signals and Start-up Time
Watchdog Timer
2570A–AVR–09/04
ATmega325/3250/645/6450 features an internal bandgap reference. This reference is
used for Brown-out Detection, and it can be used as an input to the Analog Comparator
or the ADC.
The voltage reference has a start-up time that may influence the way it should be used.
The start-up time is given in Table 19. To save power, the reference is not always turned
on. The reference is on during the following situations:
1. When the BOD is enabled (by programming the BODLEVEL [1..0] Fuse).
2. When the bandgap reference is connected to the Analog Comparator (by setting
3. When the ADC is enabled.
Thus, when the BOD is not enabled, after setting the ACBG bit or enabling the ADC, the
user must always allow the reference to start up before the output from the Analog Com-
parator or ADC is used. To reduce power consumption in Power-down mode, the user
can avoid the three conditions above to ensure that the reference is turned off before
entering Power-down mode.
Table 19. Internal Voltage Reference Characteristics
Note:
The Watchdog Timer is clocked from a separate On-chip Oscillator which runs at
1 MHz. This is the typical value at V
at other V
interval can be adjusted as shown in Table 21 on page 45. The WDR – Watchdog Reset
– instruction resets the Watchdog Timer. The Watchdog Timer is also reset when it is
disabled and when a Chip Reset occurs. Eight different clock cycle periods can be
selected to determine the reset period. If the reset period expires without another
Watchdog Reset, the ATmega325/3250/645/6450 resets and executes from the Reset
Vector. For timing details on the Watchdog Reset, refer to Table 21 on page 45.
To prevent unintentional disabling of the Watchdog or unintentional change of time-out
period, two different safety levels are selected by the fuse WDTON as shown in Table
20. Refer to “Timed Sequences for Changing the Configuration of the Watchdog Timer”
on page 46 for details.
Table 20. WDT Configuration as a Function of the Fuse Settings of WDTON
WDTON
Unprogrammed
Programmed
Symbol
V
t
I
the ACBG bit in ACSR).
BG
BG
BG
1. Values are guidelines only. Actual values are TBD.
CC
Parameter
Bandgap reference voltage
Bandgap reference start-up time
Bandgap reference current
consumption
levels. By controlling the Watchdog Timer prescaler, the Watchdog Reset
Safety
Level
1
2
WDT Initial
State
Disabled
Enabled
CC
ATmega325/3250/645/6450
= 5V. See characterization data for typical values
V
V
V
Condition
How to Disable the
WDT
Timed sequence
Always enabled
T
T
T
CC
CC
CC
A
A
A
= 25°C
= 25°C
= 25°C
= 2.7V,
= 2.7V,
= 2.7V,
(1)
Min
1.0
Typ
1.1
How to Change
Time-out
Timed sequence
Timed sequence
40
15
Max
1.2
70
Units
µA
µs
V
43