ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 35
ATMEGA325-16AJ
Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA325-16AJ.pdf
(347 pages)
- Current page: 35 of 347
- Download datasheet (3Mb)
Standby Mode
Table 15. Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Notes:
Power Reduction
Register
Power Reduction Register -
PRR
2570A–AVR–09/04
Sleep Mode
Idle
ADC Noise
Reduction
Power-down
Power-save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is not running in asynchronous mode.
3. For INT0, only level interrupt.
(1)
Active Clock Domains
X
Oscillator is stopped during sleep. If Timer/Counter2 is not using the synchronous clock,
the clock source is stopped during sleep. Note that even if the synchronous clock is run-
ning in Power-save, this clock is only available for Timer/Counter2.
When the SM2..0 bits are 110 and an external crystal/resonator clock option is selected,
the SLEEP instruction makes the MCU enter Standby mode. This mode is identical to
Power-down with the exception that the Oscillator is kept running. From Standby mode,
the device wakes up in six clock cycles.
The Power Reduction Register, PRR, provides a method to stop the clock to individual
peripherals to reduce power consumption. The current state of the peripheral is frozen
and the I/O registers inaccessible. Resources used by the peripheral when stopping the
clock will remain occupied so the peripheral should be disabled before stopping the
clock. Waking up a module, which is done by clearing the bit in PRR, puts the module in
the same state as before shutdown.
Module shutdown can be used in IDLE mode and active mode to reduce the overall
power consumption. In all other sleep modes, the clock is already stopped.
• Bits 7..4 - Res: Reserved bits
These bits are reserved bits in ATmega325/3250/645/6450 and will always read as
zero.
• Bit 3 - PRTIM1: Power Reduction Timer/Counter1
Writing logic one to this bit shuts down the Timer/Counter1 module. When
Timer/Counter1 is enabled, operation will continue like before the shutdown.
Bit
Read/Write
Initial Value
X
X
X
X
X
R
7
–
0
X
X
X
Oscillators
R
6
–
0
R
5
–
0
X
X
X
(2)
(2)
(2)
ATmega325/3250/645/6450
R
4
–
0
X
X
X
X
X
(3)
(3)
(3)
(3)
PRTIM1
R/W
3
0
X
X
X
X
X
PRSPI
R/W
Wake-up Sources
2
0
X
X
X
(2)
PRUSART0
R/W
1
0
X
X
PRADC
R/W
0
0
X
X
PRR
X
35
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