ATMEGA325-16AJ ATMEL [ATMEL Corporation], ATMEGA325-16AJ Datasheet - Page 65

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ATMEGA325-16AJ

Manufacturer Part Number
ATMEGA325-16AJ
Description
8-bit Microcontroller with In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Alternate Functions of Port F
2570A–AVR–09/04
Table 33. Overriding Signals for Alternate Functions in PE3..PE0
Note:
The Port F has an alternate function as analog input for the ADC as shown in Table 34.
If some Port F pins are configured as outputs, it is essential that these do not switch
when a conversion is in progress. This might corrupt the result of the conversion. If the
JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS) and
PF4(TCK) will be activated even if a reset occurs.
Table 34. Port F Pins Alternate Functions
• TDI, ADC7 – Port F, Bit 7
ADC7, Analog to Digital Converter, Channel 7
TDI, JTAG Test Data In: Serial input data to be shifted in to the Instruction Register or
Data Register (scan chains). When the JTAG interface is enabled, this pin can not be
used as an I/O pin.
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Port Pin
PF7
PF6
PF5
PF4
PF3
PF2
PF1
PF0
1. AIN0D and AIN1D is described in “Digital Input Disable Register 1 – DIDR1” on page
192.
PE3/AIN1/
PCINT3
0
0
0
0
0
0
(PCINT3 •
PCIE0) +
AIN1D
PCINT3 • PCIE0
PCINT3 INPUT
AIN1 INPUT
Alternate Function
ADC7/TDI (ADC input channel 7 or JTAG Test Data Input)
ADC6/TDO (ADC input channel 6 or JTAG Test Data Output)
ADC5/TMS (ADC input channel 5 or JTAG Test mode Select)
ADC4/TCK (ADC input channel 4 or JTAG Test ClocK)
ADC3 (ADC input channel 3)
ADC2 (ADC input channel 2)
ADC1 (ADC input channel 1)
ADC0 (ADC input channel 0)
(1)
PE2/XCK/AIN0/
PCINT2
XCK OUTPUT
ENABLE
XCK
0
0
0
0
(PCINT2 •
PCIE0) +
AIN0D
PCINT2 • PCIE0
XCK/PCINT2
INPUT
AIN0 INPUT
ATmega325/3250/645/6450
(1)
.
PE1/TXD/
PCINT1
TXEN
0
TXEN
1
TXEN
TXD
PCINT1 • PCIE0
1
PCINT1 INPUT
PE0/RXD/PCINT
0
RXEN
PORTE0 • PUD
RXEN
0
0
0
PCINT0 • PCIE0
1
RXD/PCINT0
INPUT
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