XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 102
XC68HC705JJ7
Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705JJ7.pdf
(242 pages)
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Parallel Input/Output
7.5.1 Port C Data Register
7.5.2 Data Direction Register C
Advance Information
102
The port C data register (PORTC) contains a bit for each of the port C
pins. When a port C pin is programmed to be an output, the state of its
data register bit determines the state of the output pin. When a port C pin
is programmed to be an input, reading the port C data register returns
the logic state of the pin.
PC7–PC0 — Port C Data Bits
The contents of the port C data direction register (DDRC) determine
whether each port C pin is an input or an output. Writing a logic 1 to a
DDRC bit enables the output buffer for the associated port C pin. A
DDRC bit set to a logic 1 also disables the pulldown device for that pin.
Writing a logic 0 to a DDRC bit disables the output buffer for the
associated port C pin. A reset initializes all DDRC bits to logic 0s,
configuring all port C pins as inputs.
Address:
Reset:
These read/write bits are software programmable. Data direction of
each bit is under the control of the corresponding bit in the port C data
direction register (DDRC). Reset has no effect on port C data.
Read:
Write:
$0002
Bit 7
PC7
Figure 7-13. Port C Data Register (PORTC)
Parallel Input/Output
PC6
6
PC5
5
Unaffected by reset
MC68HC705JJ7 • MC68HC705JP7 — REV 4
PC4
4
PC3
3
PC2
2
PC1
1
MOTOROLA
Bit 0
PC0
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