XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 163

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

11.4 Alternate Counter Registers
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA
NOTE:
Address:
Address:
When the free-running counter rolls over from $FFFF to $0000, the timer
overflow flag bit (TOF) is set in the TSR. When the TOF is set, it can
generate an interrupt if the timer overflow interrupt enable bit (TOIE) is
also set in the TCR. The TOF flag bit can only be reset by reading the
TMRL after reading the TSR.
Other than clearing any possible TOF flags, reading the TMRH and
TMRL in any order or any number of times does not have any effect on
the 16-bit free-running counter.
To prevent interrupts from occurring between readings of the TMRH and
TMRL, set the I bit in the condition code register (CCR) before reading
TMRH and clear the I bit after reading TMRL.
The functional block diagram of the 16-bit free-running timer counter and
alternate counter registers is shown in
counter registers behave the same as the timer registers, except that
any reads of the alternate counter will not have any effect on the TOF
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 11-3. Programmable Timer Registers (TMRH and TMRL)
$0018
$0018
Bit 15
Bit 7
Bit 7
Bit 7
1
1
Programmable Timer
= Unimplemented
14
6
1
6
6
1
13
5
1
5
5
1
12
4
1
4
4
1
Figure
11
3
1
3
3
1
11-4. The alternate
Alternate Counter Registers
10
2
1
2
2
1
Programmable Timer
Advance Information
1
9
1
1
1
0
Bit 0
Bit 8
Bit 0
Bit 0
1
0
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