XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 92
XC68HC705JJ7
Manufacturer Part Number
XC68HC705JJ7
Description
MICROCONTROLLER
Manufacturer
Motorola
Datasheet
1.XC68HC705JJ7.pdf
(242 pages)
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Parallel Input/Output
7.4.3 Pulldown Register B
7.4.4 Port B Logic
Advance Information
92
Address:
All port B pins can have software programmable pulldown devices
enabled or disabled globally by the SWPDI bit in the MOR. These
pulldown devices are individually controlled by the write-only pulldown
register B (PDRB) shown in
in the PDRB turns on the pulldown devices if the port B pin is an input.
Reading the PDRB returns undefined results since it is a write-only
register. Reset clears the PDIB7–PDIB0 bits, which turns on all the port
B pulldown devices.
PDIB7–PDIB0 — Port B Pulldown Inhibit Bits
All port B pins have the general I/O port logic similar to port A; but they
also share this function with inputs or outputs from other modules, which
are also attached to the pin itself or override the general I/O function.
PB0, PB1, PB2, and PB3 simply share their inputs with another module.
PB4, PB5, PB6, and PB7 will have their operation altered by outputs or
controls from other modules.
Reset:
Read:
Write:
Writing to these write-only bits controls the port B pulldown devices.
Reading these pulldown register B bits returns undefined data. Reset
clears bits PDIB7–PDIB0.
1 = Corresponding port B pin pulldown device turned off
0 = Corresponding port B pin pulldown device turned on if pin has
$0011
PDIB7
Bit 7
been programmed by the DDRB to be an input
0
Figure 7-7. Pulldown Register B (PDRB)
Parallel Input/Output
= Unimplemented
PDIB6
6
0
PDIB5
5
0
Figure
PDIB4
MC68HC705JJ7 • MC68HC705JP7 — REV 4
4
0
7-7. Clearing the PDIB7–PDIB0 bits
PDIB3
3
0
PDIB2
2
0
PDIB1
1
0
MOTOROLA
DIB0
Bit 0
0
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