XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 110

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Analog Subsystem
8.3 Analog Multiplex Register
Advance Information
110
Address:
The end of the A/D conversion time can be captured by these means:
The analog multiplex register (AMUX) controls the general
interconnection and operation. The control bits in the AMUX are shown
in
HOLD, DHOLD
Reset:
Read:
Write:
Figure
•
•
•
These read/write bits control the source connection to the negative
input of voltage comparator 2 shown in
voltage on the internal temperature sensing diode, the channel
selection bus, or the divide-by-two channel selection bus to charge
the internal sample capacitor and to also be presented to comparator
2. The decoding of these sources is given in
During the hold case when both the HOLD and DHOLD bits are clear,
the VOFF bit in the analog status register (ASR) can offset the V
reference on the sample capacitor by approximately 100 mV. This
offset source is bypassed whenever the sample capacitor is being
charged with either the HOLD or DHOLD bit set. The VOFF bit must
be enabled by the OPT bit in the COPR at location $1FF0.
Input capture in the 16-bit programmable timer
Interrupt generated by the comparator output
Software polling of the comparator output using software loop time
$0003
HOLD
Bit 7
1
8-2.
Figure 8-2. Analog Multiplex Register (AMUX)
DHOLD
Analog Subsystem
6
0
INV
5
0
VREF
MC68HC705JJ7 • MC68HC705JP7 — REV 4
4
0
MUX4
Figure
3
0
Table
MUX3
8-3. This allows the
2
0
8-1.
MUX2
1
0
MOTOROLA
MUX1
Bit 0
0
SS