XC68HC705JJ7 Motorola, XC68HC705JJ7 Datasheet - Page 192

• Manufacturer Part Number: XC68HC705JJ7
• Description: MICROCONTROLLER
• Manufacturer: Motorola

Instruction Set
14.3 Addressing Modes
14.3.1 Inherent
14.3.2 Immediate
Advance Information
192
high-order product is stored in the index register, and the low-order
product is stored in the accumulator.
The CPU uses eight addressing modes for flexibility in accessing data.
The addressing modes provide eight different ways for the CPU to find
the data required to execute an instruction. The eight addressing modes
are:
Inherent instructions are those that have no operand, such as return
from interrupt (RTI) and stop (STOP). Some of the inherent instructions
act on data in the CPU registers, such as set carry flag (SEC) and
increment accumulator (INCA). Inherent instructions require no operand
address and are one byte long.
Immediate instructions are those that contain a value to be used in an
operation with the value in the accumulator or index register. Immediate
instructions require no operand address and are two bytes long. The
opcode is the first byte, and the immediate data value is the second byte.
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Inherent
Immediate
Direct
Extended
Indexed, no offset
Indexed, 8-bit offset
Indexed, 16-bit offset
Relative
Instruction Set
MC68HC705JJ7 • MC68HC705JP7 — REV 4
MOTOROLA